About

I am an Assistant Professor at University of California, Santa Cruz (UCSC) in the department of computer science and engineering (CSE). I’m also a part time Security Research Engineer at Trail of Bits in the AI/ML Assurance team. My research interests are in concurrency: programming, modeling, testing, and architecture. In particular, I am interested in exploring new programming models that enable development of correct and efficient applications on interesting (i.e. new or emerging) architectures.

I see GPGPU programming as pragmatic avenue to explore different ideas in concurrency (and also programming GPUs is fun!). Given this, much of my work is framed using GPGPU. I am an invited individual contributer to the Khronos Group (Sponsored by Google) where we think about how to evolve official standards.

I am always looking for motivated students (PhD, MS, or undergrad); please message me if the above description interests you!!

Previously, I was a Post Doc at Princeton working in Margaret Martonosi’s group. I received my PhD from the Multicore Programming Group at Imperial College London supervised by Alastair Donaldson. Even earlier, I worked with Ganesh Gopalakrishnan and Zvonimir Rakamaric at University of Utah for my undergad and MS.

Interests

  • Concurrency - semantics, testing, verification
  • Heterogeneous Systems - GPUs, accelerators
  • Compilers - portability, optimizations

Education

  • PhD in Computer Science, 2018

    Imperial College London

  • MS in Computer Science, 2014

    University of Utah

  • BSc in Computer Science, 2012

    University of Utah

Students

Phd Students

MS Students

Undergrad Students

  • Albert Lee, Shaan Mistry, Sean Siddens

Alumni

Teaching

I teach classes at UCSC on compilers and parallel programming. I also co-organize a seminar series with Professor Lindsey Kuper.

Publications

Conference

(2024). LeftoverLocals: Listening to LLM Responses Through Leaked GPU Local Memory. ArXiv, work done while at Trail of Bits.

PDF

(2023). GPUHarbor: Testing GPU Memory Consistency at Large (Experience Paper). Distinguished Artifact Award in ISSTA.

PDF

(2023). MC Mutants: Evaluating and Improving Testing for Memory Consistency Specifications. Distinguished Paper Award and Distinguished Artifact Award in ASPLOS.

PDF

(2021). Specifying and Testing GPU Workgroup Progress Models. In OOPSLA.

PDF Code Test Explorer

(2021). The Semantics of Shared Memory in Intel CPU/FPGASystems. In OOPSLA.

PDF Code Blog

(2021). GraphAttack: Optimizing Data Supply for Graph Applications on In-Order Multicore Architectures. In TACO.

PDF

(2020). Foundations of Empirical Memory Consistency Testing. In OOPSLA.

PDF Video

(2020). Slow and Steady: Measuring and Tuning Multicore Interference. in RTAS.

PDF

(2020). MosaicSim: A Lightweight, Modular Simulator for Heterogeneous Systems. Best Paper Nomination in ISPASS.

PDF

(2019). One size doesn’t fit all: quantifying performance portability of graph applications on GPUs. Best Paper Award in IISWC.

PDF Slides

(2018). GPU schedulers: how fair is fair enough?. in CONCUR.

PDF Slides

(2018). The semantics of transactions and weak memory in x86, Power, ARM, and C++. Best Paper Award in PLDI.

PDF

(2017). Cooperative kernels: GPU multitasking for blocking algorithms. Distinguished Paper Award in FSE.

PDF Code Poster Slides

(2017). Automatically comparing memory consistency models. In POPL.

PDF

(2016). Portable inter-workgroup barrier synchronisation for GPUs. In OOPSLA.

PDF Code Slides

(2015). GPU concurrency: weak behaviours and programming assumptions. In ASPLOS.

PDF Dataset Poster

Publications

Workshop

(2020). A Simulator and Compiler Framework for Agile Hardware-Software Co-design Evaluation and Exploration. Invited talk at ICCAD.

PDF Slides

(2019). Performance evaluation of OpenCL standard support (and beyond). Best Paper Award in IWOCL.

PDF Slides

(2015). I compute, therefore I am (buggy): methodic doubt meets multiprocessors. in TinyToCS (vol 3).

PDF

(2013). Towards shared memory consistency models for GPUs. 1st place undergrad SRC in ICS.

Preprint PDF Poster

Projects

DECADES Tiled Architecture

A new tiled heterogeneous architecture to explore hardware/software co-designs

Testing GPU weak memory models

running small tests on GPUs to understand (and test) memory ordering properties

Service

A sampling of my recent service

  • Program Committee Vice Chair: ASPLOS 2024
  • Program Committee: PLDI 2024, ASPLOS 2022, IA^3 2021, PACT 2021, CF 2021, FORTE 2020, PLDI 2020, IWOCL 2019
  • SRC co-chair: PLDI 2021, 2022
  • External Program Committee: MICRO 2021, MICRO 2020, ASPLOS 2020, ISCA 2019

Theses

MS: Testing and Exposing Weak GPU Memory Models
BS: Towards Shared Memory Consistency Models for GPUS

Awards and Recognition

ISSTA'23 Distinguished Artifact Award 2023
ASPLOS'23 Distinguished Paper Award 2023
ASPLOS'23 Distinguished Artifact Award 2023
ISPASS'20 Best Paper Nomination 2020
IISWC'19 Best Paper Award 2019
IWOCL'19 Distinguished Paper Award 2019
PLDI'18 Distinguished Paper Award 2018
FSE'17 Distinguished Paper Award 2017
ICL Art of Research Staff Pick 2016

Funding

I am grateful to the following organizations for funding support:

  • NSF: CAREER award support for exploring heterogeneous memory models

  • Google: support for memory consistency testing work

  • DARPA: support for irregular application acceleration (subcontracted from the DECADES project)