Saba Jamilan

I'm a Computer Engineering PhD student at the University of California, Santa Cruz, working with Heiner Litz. I work on improving microprocessor IPC for data center workloads.
A copy of my resume is available here.


University of California, Santa Cruz

PhD, Computer Engineering
Advisor: Professor Heiner Litz
September 2018 - Present
Santa Curz, CA, US

University of Tehran

M.Sc., Computer Engineering - Computer Architecture
2014 - 2017
Tehran, Iran

Khajeh Nassir-Al-Deen Toosi (K. N. Toosi) University of Technology

B.Sc., Computer Engineering - Hardware
2009 - 2013
Tehran, Iran


  • Cache Energy Management through Dynamic Reconfiguration Approach in OptoElectrical No
    S. Jamilan, M. Abdollahi, and S. Mohammadi
    The 25th Euromicro International Conference on Parallel, Distributed, and Network-Based Processing(PDP), 2017

Research Experience

Research Assistant at University of California, Santa Cruz

Working with Prof. Heiner Litz
September 2018 - present

Research Assistant at University of Tehran

School of ECE, Dependable System Design Lab
Working with Prof. Siamak Mohammadi
2014 - 2017

Teaching Experience

Teaching Assistant at University of California, Santa Cruz

Computer Architecture (CSE 120)
Winter 2019, Fall 2019

Teaching Assistant at University of Tehran

Multi-core Embedded Systems
Sprint 2016, Spring 2017

Coursework and acadmica projects

Advanced Parallel Processing (CSE 226 at UCSC)

Machine Learning (CSE 242 at UCSC)

Advanced Topics in Computer Engineering (CSE 293 at UCSC)

Advanced Computer Architecture

Project: Implementing a Low Power Branch Predictor for MIPS Processor

Interconnection Networks

Project: Investigating the Possibility of Free-Contention Routing in an Electrical Network-on-Chip by BookSim Simulator

Functional Verification of HDL Models

Project: Fully Functional Verification of a MIPS Processor, writing Stimuli Generator and Checker with System Verilog Verification Language

Fault Tolerant System Design

Project: RTL Fault Simulation and Injection on Sayeh Processor

On-Chip Multi-Processors

Project: Analysis of Traces Corresponding to Different Cache Memory Hierarchies During Running Multiple Workloads on a Multicore Processor

Parallel Processing

Project: Using OpenMP and Pthreads Libraries for Improving Speedup at Several Image Processing Algorithms

Asynchronous Circuit Design

Project: Investigating Performance and Power Consumption of Different Kinds of Asynchronous Pipelines (HSPICE, balsa)

Very-Large-Scale Integration Design (VLSI)

Project: Synthesis and Time/Area Optimization of a Simplified MIPS Processor using Synopsys Design Compiler Tool


  • Top 0.4% of 30,000+ participants in Iranian National Graduate Exam, 2014
  • Top 0.5% of 400,000+ participants in Iranian National University Exam, 2009
  • Membership of The National Organization for Development of Exceptional Talents (NODET), 2005-2009