Computer architecture, including design effort metrics and models, infrared thermal measurements and modeling, simulation, FPGA/ASIC design, and mobile pervasive computing.
Looking for good MS students. We have many projects to help, contact me if you are looking for a MS thesis.
Future Conference Deadlines
A list of computer architecture conferences.
WikiCFP for computer architecture.
WikiCFP for design automation.
A map of computer architecture conferences.
NSF SHF Cascode Supporting and Leveraging Voltage Stacking in Future Microprocessors ($285K)
NSF XPS Cooperative Deterministic Concurrency ($750K)
Recent Selected Publications
SRAM Voltage Stacking,
Elnaz Ebrahimi, Rafael Trapani Possignolo, and Jose Renau, International Symposium on Circuits and Systems (ISCAS), May 2016.
Analysis of PARSEC Workload Scalability,
Gabriel Southern and Jose Renau, International Symposium on Performance Analysis of Systems and Software (ISPASS), April 2016.
LiveSim: Going Live with Microarchitecture Simulation,
Sina Hassani, Gabriel Southern and Jose Renau, International Symposium on High-Performance Computer Architecture (HPCA), February 2016.
Managing Mismatches in Voltage Stacking with CoreUnfolding,
Ehsan K. Ardestani, Rafael Trapani Possignolo, Jose Luis Briz, and Jose Renau, ACM's Transactions on Architecture and Code Optimization (TACO), September 2015.