CMPE 222 Digital VLSI Design

Kevin Karplus

A non-project course on digital cMOS design, emphasizing hierarchical design using various design tools, including verilog, magic, and rsim. Although the course can be taken by itself, it is intended primarily to prepare students to take CMPE 223. Offered alternate years (next: Fall 1995).

Syllabus for Fall 1995, in Postscript format.

Homework 3 (layout from stick diagrams), Fall 1995.

CMPE 223 Digital VLSI Design Project

This course has no lectures---just weekly group meetings between the instructor and the project teams. The teams design, simulate, and lay out complex digital systems for fabrication in cMOS through MOSIS. It is recommended that students sign up for an independent study in addition to 223, as the workload is approximately twice that of a normal graduate course. Offered alternate years (next: Winter 1996).

Newsgroup

There is a newsgroup ( ucsc.class.cmpe222) for the class (available only within UCSC). For posting to the newsgroup, it is generally better to be working from a UNIX machine, so that proper mailing addresses are generated.

MOSIS

Our chips are fabricated by the silicon broker MOSIS
Kevin Karplus
Computer Engineering
University of California, Santa Cruz
Santa Cruz, CA 95064
USA
karplus@cse.ucsc.edu
(408) 459-4250