CMPE 222 Digital VLSI Design
Kevin Karplus
A non-project course on custom digital cMOS design, emphasizing
hierarchical design using various design tools, including verilog,
magic, and rsim.
Note: "non-project" just means we won't fabricate any of the
designs---you will lay out a full custom chip and simulate it at the
switch level.
Offered alternate years (next: Winter 2000).
-
Syllabus for Winter 2000.
-
-
Some keypoints about digital amplifiers and building logic from switches.
-
Getting started with the university-written cad tools.
(NOT REVISED YET---see the f97 one)
-
A simplified view of 2-phase clocking.
-
Homework assignment 1
-
Verilog homework assignment
-
First layout homework assignment
-
Finite-state machine and PLA assignment
-
Multiplier layout assignment
- Other documentation is in
/projects/cad/doc
-
Syllabus for Fall 1997.
-
-
Some keypoints about digital amplifiers and building logic from switches.
-
Getting started with the university-written cad tools.
-
A simplified view of 2-phase clocking.
-
Web page for Fall 1995.
-
Syllabus for Fall 1995, in Postscript format.
Newsgroup
There is a newsgroup (
ucsc.class.cmpe222) for the class.
For posting to the newsgroup, it is generally better to be working
from a UNIX machine, so that proper mailing addresses are generated.
MOSIS
Our chips are fabricated by the silicon broker
MOSIS