CMPEE 100 Lab #1
Report due by midnight Friday April 9

Preparation

The purpose of this lab is to familiarize yourself with the lab equipment and general logic concepts. This week we will be checking out the lab components, which means you need to bring two checks, a refundable $25 deposit for the lab proto-kit, and a non refundable $10 check for lab fees. You can pay in cash but checks are much preferred.

Lab work

Simple logic gates and seven-segment displays:

  1. In your parts kit that you just purchased, you have some SSI logic gates. Can you handle these parts without destroying them with the static charge on your body? What does SSI mean? What does the alpha-numeric marking tell you about the part?
  2. Find in your parts kit the ICs labeled 74LS00 and 74LS86, and connect them to the protokit in the following fashon:

    pin 14 to +5 volts
    pin 7 to ground
    pins 1 and 2 to switches
    pin 3 to one of the LED's

  3. Likwise wire the 74LS27:

    pin 14 to +5 volts
    pin 7 to ground
    pins 1,2,13 to input switches pin 12 to one of the LED's

  4. Without using a data sheet, generate the truth table for the three devices. What are these three devices?
  5. Now that you have figured out what these devices are, model and simulate the circuit that you just built in the Xilinx foundation software.
  6. Your protokit has four 7-segment displays that are used for displaying outputs. Connect four switches to the input of one of the displays, without disconnecting anything that you've wired so far. Does the output make sense? Why does the display read 'F' when nothing is wired to it? If you consider all four digits, what is the maximum number (base 10) that you can display on the protokit?
  7. Demonstrate lab 1 to the TA by showing the wired circuit and the simulation.

Lab 2 prelab

Next week, you will be designing a circuit called a full adder, which is a fundamental building block in digital design. The circuit will sum three bits and display the 2-bit output with LEDs.
  1. Write the truth table for each output.
  2. Write a logic equation for each output.

Report

The lab report for this lab is relatively simple. You should make it look like the sample on the web, in that you should follow the format, and describe what you did and the results of the simulation. You must include the logic diagram and truth table in your write up. You should address the questions posed above. Submit your lab report as a postscript (or HTML) file by emailing it as an attachment to the TA of your lab section. If you use HTML, make sure that all the associated image files (GIF, JPEG, ...) are also mailed.

Don't forget to include the prelab for next week's lab assignment.


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Questions about page content should be directed to

Kevin Karplus
Computer Engineering
University of California, Santa Cruz
Santa Cruz, CA 95064
USA
karplus@cse.ucsc.edu
1-831-459-4250